The present invention relates to the field of frequency divider circuits, especially those useful in integrated circuit arrangements.
With respect to frequency divider circuitry presently used in integrated circuit arrangements, there is a conflict between those circuits which are capable of operating at relatively high speeds, i.e., high frequencies, and those which provide relatively dense integrated circuit structures, i.e., integrated circuit structures with a relatively large number of divider stages per unit area. I.sup.2 L (Integrated Injection Logic) integrated circuits are relatively dense structures because they employ bipolar transistors formed in an area of semiconductor material, sometimes called a boat, which serves as a commonly shared emitter region. Unfortunately, because of the circuit arrangement of I.sup.2 L circuits, the current flowing through the component transistors cannot be readily controlled. As a result, the component transistors tend to reach a saturated or high current stage which limits the operating speed of the integrated circuit. TTL (Transistor Transistor Logic) and ECL (Emitter Coupled Logic) integrated circuits are capable of operating at relatively high speeds because the current flowing through the component transistors can be controlled to be below the saturation level. Unfortunately, these types of structures employ arrangements in which the component bipolar transistors for the most part do not all share a common electrode region. As a result, these integrated circuit structures have relatively low densities. Although integrated circuits utilizing field effect transistors arranged in logic configurations such as N-MOS (N-channel Metal Oxide Semiconductor), P-MOS (P-channel Metal Oxide Semiconductor) and C-MOS (Complementary Metal Oxide Semiconductor) integrated circuits have relatively high densities, their speeds are limited by relatively large interelectrode capacitances considering the currents present in these devices. In addition, MOS integrated circuits operate at voltage levels which are not directly compatible with bipolar circuitry which may be employed in analog circuitry associated with the frequency division circuitry.